[PATCH net v2 1/1] net: stmmac: dwmac-tegra: Read iommu stream id from device tree
Jakub Kicinski
kuba at kernel.org
Thu Jan 9 16:54:48 PST 2025
On Tue, 7 Jan 2025 16:24:59 -0500 Parker Newman wrote:
> Nvidia's Tegra MGBE controllers require the IOMMU "Stream ID" (SID) to be
> written to the MGBE_WRAP_AXI_ASID0_CTRL register.
>
> The current driver is hard coded to use MGBE0's SID for all controllers.
> This causes softirq time outs and kernel panics when using controllers
> other than MGBE0.
Applied, thanks!
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