[PATCH v3 1/2] phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk

[Roger Quadros]

On 09/01/2025 14:16, Siddharth Vadapalli wrote:
> From: Swapnil Jakhade <sjakhade at cadence.com>
> 
> Add register sequences to support PCIe multilink configuration for 100MHz
> reference clock. Maximum two PCIe links are supported.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade at cadence.com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>

Reviewed-by: Roger Quadros <rogerq at kernel.org>