[PATCH v2 2/6] arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1
Ivaylo Ivanov
ivo.ivanov.ivanov1 at gmail.com
Sat Jan 4 08:43:17 PST 2025
Add syscon nodes for peric0/1, typically used for USI, and fsys0/1,
typically used for PCI.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1 at gmail.com>
---
arch/arm64/boot/dts/exynos/exynos8895.dtsi | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index 4fb9be850..5302a8c1b 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -228,6 +228,12 @@ cmu_peric0: clock-controller at 10400000 {
"usi1", "usi2", "usi3";
};
+ syscon_peric0: syscon at 10420000 {
+ compatible = "samsung,exynos8895-peric0-sysreg", "syscon";
+ reg = <0x10420000 0x2000>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>;
+ };
+
serial_0: serial at 10430000 {
compatible = "samsung,exynos8895-uart";
reg = <0x10430000 0x100>;
@@ -273,6 +279,12 @@ cmu_peric1: clock-controller at 10800000 {
"usi10", "usi11", "usi12", "usi13";
};
+ syscon_peric1: syscon at 10820000 {
+ compatible = "samsung,exynos8895-peric1-sysreg", "syscon";
+ reg = <0x10820000 0x2000>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
+ };
+
serial_1: serial at 10830000 {
compatible = "samsung,exynos8895-uart";
reg = <0x10830000 0x100>;
@@ -380,6 +392,12 @@ cmu_fsys0: clock-controller at 11000000 {
"ufs", "usbdrd30";
};
+ syscon_fsys0: syscon at 11020000 {
+ compatible = "samsung,exynos8895-fsys0-sysreg", "syscon";
+ reg = <0x11020000 0x2000>;
+ clocks = <&cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK>;
+ };
+
pinctrl_fsys0: pinctrl at 11050000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x11050000 0x1000>;
@@ -398,6 +416,12 @@ cmu_fsys1: clock-controller at 11400000 {
clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
};
+ syscon_fsys1: syscon at 11420000 {
+ compatible = "samsung,exynos8895-fsys1-sysreg", "syscon";
+ reg = <0x11420000 0x2000>;
+ clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK>;
+ };
+
pinctrl_fsys1: pinctrl at 11430000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x11430000 0x1000>;
--
2.43.0
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