[PATCH 2/5] PCI: mediatek-gen3: Add MT8196 support
Bjorn Helgaas
helgaas at kernel.org
Fri Jan 3 11:02:45 PST 2025
On Fri, Jan 03, 2025 at 02:00:12PM +0800, Jianjun Wang wrote:
> The MT8196 is an ARM platform SoC that has the same PCIe IP as the
> MT8195.
> However, it requires additional settings in the pextpcfg registers.
> Introduce pextpcfg in PCIe driver for these settings.
Add blank lines between paragraphs.
> + * The values of some registers are different in RC and EP mode. Therefore,
> + * call soc->pre_init after the mode change in case it depends on these registers.
Wrap this to fit in 80 columns like the rest of the file.
> + /* Adjust SYS_CLK_RDY_TIME ot 10us to avoid glitch */
s/ot/to/
Is this an erratum? Is there any spec or erratum citation you can
include in the comment?
> + val = readl_relaxed(pcie->base + PCIE_RESOURCE_CTRL_REG);
> + val &= ~PCIE_SYS_CLK_RDY_TIME_MASK;
> + val |= PCIE_SYS_CLK_RDY_TIME_TO_10US;
> + writel_relaxed(val, pcie->base + PCIE_RESOURCE_CTRL_REG);
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