[PATCH v2 0/2] ARM: implement cacheinfo support (for v7/v7m)

[Dmitry Baryshkov]

On Thu, Nov 07, 2024 at 04:34:36PM +0200, Dmitry Baryshkov wrote:
> On Thu, Nov 07, 2024 at 02:55:55PM +0100, Linus Walleij wrote:
> > Hi Dmitry,
> > 
> > On Mon, Oct 14, 2024 at 3:55 PM Dmitry Baryshkov
> > <dmitry.baryshkov at linaro.org> wrote:
> > 
> > > Follow the ARM64 platform and implement simple cache information driver.
> > > As it reads data from CTR (ARMv6+) and CLIDR (ARMv7+) registers, it is
> > > limited to the ARMv7 / ARMv7M, providing simple fallback or just
> > > returning -EOPNOTSUPP in case of older platforms.
> > >
> > > In theory we should be able to skip CLIDR reading and assume that Dcache
> > > and Icache (or unified L1 cache) always exist if CTR is supported and
> > > returns sensible value. However I think this better be handled by the
> > > maintainers of corresponding platforms.
> > >
> > > Other than just providing information to the userspace, this patchset is
> > > required in order to implement L2 cache driver (and in the end CPU
> > > frequency scaling) on ARMv7-based Qualcomm devices.
> > >
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> > 
> > I added my review tags to the v2 patches, can you put them
> > into Russell's patch tracker?
> 
> Done, 9432/1 and 9433/1, thank you!

These patches are still in the patch tracker in the "Incoming" state.

Russell, Linus (and Sudeep, Ard, Arnd), is there anything blocking them
from being accepted?

-- 
With best wishes
Dmitry