[PATCH bpf-next v3 4/9] bpf: Introduce load-acquire and store-release instructions
Alexei Starovoitov
alexei.starovoitov at gmail.com
Wed Feb 26 18:18:47 PST 2025
On Wed, Feb 19, 2025 at 5:21 PM Peilin Ye <yepeilin at google.com> wrote:
>
>
> In arch/{arm64,s390,x86}/net/bpf_jit_comp.c, have
> bpf_jit_supports_insn(..., /*in_arena=*/true) return false for the new
> instructions, until the corresponding JIT compiler supports them.
...
> diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
> index a43fc5af973d..f0c31c940fb8 100644
> --- a/arch/x86/net/bpf_jit_comp.c
> +++ b/arch/x86/net/bpf_jit_comp.c
> @@ -3771,8 +3771,12 @@ bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)
> if (!in_arena)
> return true;
> switch (insn->code) {
> + case BPF_STX | BPF_ATOMIC | BPF_B:
> + case BPF_STX | BPF_ATOMIC | BPF_H:
> case BPF_STX | BPF_ATOMIC | BPF_W:
> case BPF_STX | BPF_ATOMIC | BPF_DW:
> + if (bpf_atomic_is_load_store(insn))
> + return false;
> if (insn->imm == (BPF_AND | BPF_FETCH) ||
> insn->imm == (BPF_OR | BPF_FETCH) ||
> insn->imm == (BPF_XOR | BPF_FETCH))
It's border line ok-ish to delay arena ld_acq/st_rel on x86 for a follow up,
but non-arena on x86 should be done in this patch.
It's trivial to add support on x86-64 and
limiting the selftest to:
.. defined(__TARGET_ARCH_arm64)
is just not right.
Even arena ld_acq/st_rel can be done in this patch too.
It is such a minor addition compared to the rest, so I don't see
a reason not to do it right away.
pw-bot: cr
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