[PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
Hongxing Zhu
hongxing.zhu at nxp.com
Mon Feb 24 16:49:05 PST 2025
> -----Original Message-----
> From: Frank Li <frank.li at nxp.com>
> Sent: 2025年2月25日 1:08
> To: shawnguo2 at yeah.net
> Cc: Frank Li <frank.li at nxp.com>; conor+dt at kernel.org;
> devicetree at vger.kernel.org; festevam at gmail.com; Hongxing Zhu
> <hongxing.zhu at nxp.com>; imx at lists.linux.dev; kernel at pengutronix.de;
> krzk+dt at kernel.org; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org; robh at kernel.org; s.hauer at pengutronix.de;
> shawnguo at kernel.org
> Subject: [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
>
> Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie at 4c300000:
> clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
>
> Signed-off-by: Frank Li <Frank.Li at nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 51625bc9154ec..5800a381036bc 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
> clock-output-names = "sai5_mclk";
> };
>
> + clk_sys100m: clock-sys100m {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1000000>;
s/1000000/100000000
Best Regards
Richard Zhu
> + clock-output-names = "clk_sys100m";
> + };
> +
> osc_24m: clock-24m {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> @@ -1595,6 +1602,14 @@ usb3_dwc3: usb at 4c100000 {
> };
> };
>
> + hsio_blk_ctl: syscon at 4c0100c0 {
> + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> + reg = <0x0 0x4c0100c0 0x0 0x1>;
> + #clock-cells = <1>;
> + clocks = <&clk_sys100m>;
> + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> + };
> +
> usb3_phy: phy at 4c1f0040 {
> compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
> reg = <0x0 0x4c1f0040 0x0 0x40>,
> @@ -1633,8 +1648,9 @@ pcie0: pcie at 4c300000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; @@ -1706,8
> +1722,9 @@ pcie1: pcie at 4c380000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> --
> 2.34.1
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