[PATCH v4 2/2] arm64: dts: rockchip: add MNT Reform 2

[Heiko Stuebner]

Hi Patrick,

Am Montag, 17. Februar 2025, 21:22:28 MEZ schrieb Patrick Wildt:
> MNT Reform 2 is an open source laptop with replaceable CPU modules,
> including a version with the RK3588-based MNT RCORE[1], which is based
> on Firefly's iCore-3588Q SoM:
> 
> - Rockchip RK3588
> - Quad A76 and Quad A55 CPU
> - 6 TOPS NPU
> - up to 32GB LPDDR4x RAM
> - SD Card slot
> - Gigabit ethernet port
> - HDMI port
> - 2x mPCIe ports for WiFi or NVMe
> - 3x USB 3.0 Type-A HOST port
> 
> [1] https://shop.mntre.com/products/mnt-reform
> 
> Signed-off-by: Lukas F. Hartmann <lukas at mntre.com>
> Signed-off-by: Patrick Wildt <patrick at blueri.se>

bureaucracy question, what is Lukas' relationship with the patch?
Two options:
(1) Lukas initially developed the patch, then the "From:" should be
    set accordingly
(2) Both of you developed it together, then we should have a
    Co-Developed-by: Lukas F. Hartmann <lukas at mntre.com>
    up there


Some more style things below...


> ---
> Changes for v4:
> - Added chassis-type.
> - Removed unused nodes.
> - Sorted nodes alphabetically.
> Changes for v3:
> - Split DT as it's based on a Firefly iCore-3588Q SoM.
> Changes for v2:
> - Aligned with bindings and schemas to appease DTB check warnings.
> - Aligned with format of other RK3588 boards for consistency.
> 
>  arch/arm64/boot/dts/rockchip/Makefile         |   1 +
>  .../rockchip/rk3588-firefly-icore-3588q.dtsi  | 451 ++++++++++++++++++
>  .../boot/dts/rockchip/rk3588-mnt-reform2.dts  | 336 +++++++++++++
>  3 files changed, 788 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
> 
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index def1222c1907..88381d9a20e3 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
> new file mode 100644
> index 000000000000..898a7b29692f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
> @@ -0,0 +1,451 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +
> +#include "rk3588.dtsi"
> +
> +/ {
> +	compatible = "firefly,icore-3588q", "rockchip,rk3588";
> +
> +	aliases {
> +		mmc0 = &sdhci;
> +	};
> +};
> +
> +&cpu_b0 {
> +	cpu-supply = <&vdd_cpu_big0_s0>;
> +	mem-supply = <&vdd_cpu_big0_s0>;

you don't need the unspecified mem-supply for the cpu cores,
that is vendor-kernel voodoo and not part of the upstream binding.

Same for all cores.


> +};
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
> new file mode 100644
> index 000000000000..936dd959524f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
> @@ -0,0 +1,336 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2024 MNT Research GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/soc/rockchip,vop2.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +#include "rk3588-firefly-icore-3588q.dtsi"
> +
> +/ {
> +	model = "MNT Reform 2 with RCORE RK3588 Module";
> +	compatible = "mntre,reform2-rcore", "firefly,icore-3588q", "rockchip,rk3588";
> +	chassis-type = "laptop";
> +
> +	aliases {
> +		ethernet0 = &gmac0;
> +		mmc1 = &sdmmc;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial2:1500000n8";
> +	};
> +
> +	backlight: backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&pwm8 0 10000 0>;
> +		enable-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
> +		brightness-levels = <0 8 16 32 64 128 160 200 255>;
> +		default-brightness-level = <128>;

please sort standard properties alphabetically (compatible at the top,
status at the bottom, rest alphabetically)

> +	};
> +
> +&pcie2x1l2 {
> +	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> +	pinctrl-0 = <&pcie2_0_rst>;

more sorting

> +	status = "okay";
> +};
> +

> +&pcie3x4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie3_reset>;
> +	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
> +	num-lanes = <1>;

again sorting

> +	vpcie3v3-supply = <&vcc3v3_pcie30>;
> +	status = "okay";
> +};
> +

> +&sdmmc {
> +	bus-width = <4>;
> +	max-frequency = <40000000>;
> +	no-sdio;
> +	no-mmc;
> +	no-1-8-v;
> +	cap-sd-highspeed;
> +	vqmmc-supply = <&vcc3v3_pcie30>;
> +	vmmc-supply = <&vcc3v3_pcie30>;
> +	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
> +	disable-wp;

more sorting

> +	status = "okay";
> +};
> +


Heiko