[PATCH] KVM: arm64: Fix tcr_el2 initialisation in hVHE mode
Marc Zyngier
maz at kernel.org
Wed Feb 19 14:11:38 PST 2025
On Fri, 14 Feb 2025 13:37:24 +0000, Will Deacon wrote:
> When not running in VHE mode, cpu_prepare_hyp_mode() computes the value
> of TCR_EL2 using the host's TCR_EL1 settings as a starting point. For
> nVHE, this amounts to masking out everything apart from the TG0, SH0,
> ORGN0, IRGN0 and T0SZ fields before setting the RES1 bits, shifting the
> IPS field down to the PS field and setting DS if LPA2 is enabled.
>
> Unfortunately, for hVHE, things go slightly wonky: EPD1 is correctly set
> to disable walks via TTBR1_EL2 but then the T1SZ and IPS fields are
> corrupted when we mistakenly attempt to initialise the PS and DS fields
> in their E2H=0 positions. Furthermore, many fields are retained from
> TCR_EL1 which should not be propagated to TCR_EL2. Notably, this means
> we can end up with A1 set despite not initialising TTBR1_EL2 at all.
> This has been shown to cause unexpected translation faults at EL2 with
> pKVM due to TLB invalidation not taking effect when running with a
> non-zero ASID.
>
> [...]
Applied to fixes, thanks!
[1/1] KVM: arm64: Fix tcr_el2 initialisation in hVHE mode
commit: 102c51c50db88aedd00a318b7708ad60dbec2e95
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
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