[PATCH] arm64: dts: cix: Use lowercase hex

[Peter Chen]

On 25-12-29 08:17:15, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL
> 
> On 29/12/2025 02:40, Peter Chen wrote:
> > On 25-12-23 16:24:25, Krzysztof Kozlowski wrote:
> >> EXTERNAL EMAIL
> >>
> >> The DTS code coding style expects lowercase hex for values and unit
> >> addresses.
> >>
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>
> >>
> >> ---
> >>
> >> Patches done with sed, verified with comparing unflattened DTB and
> >> dtx_diff.
> >> ---
> >>  arch/arm64/boot/dts/cix/sky1.dtsi | 2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> >> index 64b76905cbff..fb8c826bbc97 100644
> >> --- a/arch/arm64/boot/dts/cix/sky1.dtsi
> >> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> >> @@ -523,7 +523,7 @@ pcie_x1_1_rc: pcie at a0e0000 {
> >>                         reg-names = "reg", "cfg", "rcsu_strap", "rcsu_status", "msg";
> >>                         ranges = <0x01000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000>,
> >>                                  <0x02000000 0x0 0x38200000 0x0 0x38200000 0x0 0x07e00000>,
> >> -                                <0x43000000 0x0C 0x00000000 0x0C 0x00000000 0x04 0x00000000>;
> >> +                                <0x43000000 0x0c 0x00000000 0x0c 0x00000000 0x04 0x00000000>;
> >
> > Sorry, I could not apply for v6.19-rc1, could you?
> 
> What do you mean? It applies cleanly on v6.19-rc1 and on next. Your
> branches are not really updated, so maybe you need to fix this.
> 

Sorry for confusing. The patch was inserted by some special characters,
See below: "=", and "3D". But no these kinds of characters when I save
internal patch for upstream. Our IT is checking this issue.

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sk=
y1.dtsi
index 64b76905cbff..fb8c826bbc97 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -523,7 +523,7 @@ pcie_x1_1_rc: pcie at a0e0000 {
                        reg-names =3D "reg", "cfg", "rcsu_strap", "rcsu_sta=
tus", "msg";
                        ranges =3D <0x01000000 0x0 0x38100000 0x0 0x3810000=
0 0x0 0x00100000>,
                                 <0x02000000 0x0 0x38200000 0x0 0x38200000 =
0x0 0x07e00000>,
-                                <0x43000000 0x0C 0x00000000 0x0C 0x0000000=
0 0x04 0x00000000>;
+                                <0x43000000 0x0c 0x00000000 0x0c 0x0000000=
0 0x04 0x00000000>;
                        #address-cells =3D <3>;
                        #size-cells =3D <2>;
                        bus-range =3D <0x30 0x5f>;

I have downloaded this patch from patchwork and applied. Thanks for
improving our dts

-- 

Best regards,
Peter