[PATCH] arm64: guard AMU register access with ARM64_HAS_AMU_EXTN

[Marek Vasut]

On 10/24/25 11:27 AM, Marc Zyngier wrote:

Hello again,

>> Similar to what Linux already does on the various speculative
>> execution bugs on x86, something like this?
>>
>> "
>> MDS CPU bug present and SMT on, data leak possible. See
>> https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/mds.html
>> for more details.
>> "
> 
> You're completely off base. The problem at hand has nothing to do with
> speculation, and everything to do with access permission to counter
> registers.
> 
> I also wouldn't be surprised if you could take your whole machine down
> from userspace just by ticking some of the AM*_EL0 registers (the
> pseudocode clearly shows that there is a route to EL3 in this case).
> 
> Honestly, I think you should stop trying to papering over this issue
> behind the user's back. If you want this addressed, do it so that the
> user knows their machine is fsck'd, and that they are OK with that. Do
> it by implementing an ID register override that requires a kernel
> command-line argument.
> 
> Do I sound like a stuck record? Probably. But that's IMO the only
> acceptable solution for what you have. I'm looking forward to
> reviewing a patch implementing that suggestion, but I'll stop even
> thinking of how to paper over this in the way you suggest.
Just to wrap this one up. TFA master shortly after 2.14 release now 
contains X5H support with fixed AMU enablement, so this AMU access issue 
is gone. I think this thread can be closed.