[PATCH v1 3/3] arm64: dts: imx95-var-dart: Add support for Variscite Sonata board

[Andrew Lunn]

> +&enetc_port1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_enetc1>;
> +	phy-handle = <&ethphy1>;
> +	/*
> +	 * The required RGMII TX and RX 2ns delays are implemented directly
> +	 * in hardware via passive delay elements on the SOM PCB.
> +	 * No delay configuration is needed in software via PHY driver.
> +	 */
> +	phy-mode = "rgmii";
> +	status = "okay";
> +};

This node is O.K, thanks for the comment.

> +
> +&enetc_port2 {
> +	phy-mode = "10gbase-r";
> +	status = "okay";
> +
> +	fixed-link {
> +		speed = <10000>;
> +		full-duplex;
> +		link-gpios = <&pca9534 1 GPIO_ACTIVE_LOW>;
> +	};
> +};

What is this ethernet connected to? In the commit message you mention
an SFP? So i would expect a phandle pointing to the SFP cage node,
which follows:

Documentation/devicetree/bindings/net/sff,sfp.yam

	Andrew