(subset) [PATCH v7 0/4] Implement hardware automatic clock gating (HWACG) for gs101

[Krzysztof Kozlowski]

On Mon, 22 Dec 2025 10:22:11 +0000, Peter Griffin wrote:
> This series addresses an issue with Samsung Exynos based upstream clock driver
> whereby the upstream clock driver sets all the clock gates into "manual mode"
> (which uses a bit that is documented as reserved in the gate registers).
> 
> Another issue with the current "manual clock gating" approach upstream is
> there are many bus/interconnect clocks whose relationships to the IPs
> are not well documented or defined in the specs. When adding a new CMU until
> now we have tried to label these clocks appropriately with CLK_IS_CRITICAL and
> CLK_IGNORE_UNUSED but doing so is both error prone and time consuming. If
> your lucky disabling a critical bus clock causes an immediate hang. Other
> clocks however aren't so obvious and show up through random instability
> some period of time later.
> 
> [...]

Applied, thanks!

[2/4] arm64: dts: exynos: gs101: add samsung,sysreg property to CMU nodes
      https://git.kernel.org/krzk/linux/c/01272f05aae5f6aca4337eb52e6b9290ce12e9f7

Best regards,
-- 
Krzysztof Kozlowski <krzk at kernel.org>