[PATCH v2 07/11] dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller

[Krzysztof Kozlowski]

On 19/12/2025 14:02, Konrad Dybcio wrote:
> On 12/17/25 2:54 PM, Krzysztof Kozlowski wrote:
>> On 17/12/2025 14:21, Konrad Dybcio wrote:
>>> On 12/17/25 11:09 AM, Krzysztof Kozlowski wrote:
>>>> On 17/12/2025 10:32, Taniya Das wrote:
>>>>>>>
>>>>>>> We would like to leverage the existing common clock driver(GDSC) code to
>>>>>>
>>>>>> Fix the driver code if it cannot handle other cells. Your drivers do not
>>>>>> matter for choices made in bindings.
>>>>>>
>>>>>
>>>>> As it is still a clock controller from hardware design and in SW I will
>>>>> be map the entire hardware region and this way this clock controller
>>>>> will also be aligned to the existing clock controllers and keep the
>>>>> #power-domain-cells = <1> as other CCs.
>>>>
>>>> I don't see how this resolves my comment.
>>>
>>> Spanning the entire 0x6000-long block will remove your worry about this
>>> description only being 2-register-wide
>>
>> But that was not the comment here. Taniya replied under comment about
>> cells. We are not discussing here some other things...
> 
> Right, you omitted the part where I answered your comment from the
> context, so I'll re-add it:
> 
> """
> This block provides more than one GDSC - although again, not all of them
> need/should be accessed by Linux. I suppose just enumerating the "extra"
> ones in bindings will be a good enough compromise?
> """
> 
> TLDR: cells=1 makes sense as per usual

Either list them in headers or at least explain that in the binding.

Best regards,
Krzysztof