[PATCH 2/4] arm64: dts: amlogic: Add S6 Reset Controller

[Xianwei Zhao]

Hi Martin,
    Thanks for your reply.

On 2025/12/17 23:51, Martin Blumenstingl wrote:
> [ EXTERNAL EMAIL ]
> 
> On Thu, Nov 27, 2025 at 8:30 AM Xianwei Zhao via B4 Relay
> <devnull+xianwei.zhao.amlogic.com at kernel.org> wrote:
> [...]
>> +#define RESET_BRG_MAIL_DMC_PIPEL       167
> On the S7 SoC this reset line is called RESET_BRG_MALI_PIPL0:
> - is MAIL <> MALI a typo (seems like it should be MALI)?
Yes. I will fix it.
> - and is PIPEL <> PIPL also a typo (I don't know which one is "correct")?
PIPEL is PIPE , I will fix it.