[PATCH rc v4 2/4] iommu/arm-smmu-v3: Mark STE MEV safe when computing the update sequence
Mostafa Saleh
smostafa at google.com
Thu Dec 18 08:40:30 PST 2025
On Tue, Dec 16, 2025 at 08:26:00PM -0800, Nicolin Chen wrote:
> From: Jason Gunthorpe <jgg at nvidia.com>
>
> Nested CD tables set the MEV bit to try to reduce multi-fault spamming on
> the hypervisor. Since MEV is in STE word 1 this causes a breaking update
> sequence that is not required and impacts real workloads.
>
> For the purposes of STE updates the value of MEV doesn't matter, if it is
> set/cleared early or late it just results in a change to the fault reports
> that must be supported by the kernel anyhow. The spec says:
>
> Note: Software must expect, and be able to deal with, coalesced fault
> records even when MEV == 0.
>
> So mark STE MEV safe when computing the update sequence, to avoid creating
> a breaking update.
>
> Fixes: da0c56520e88 ("iommu/arm-smmu-v3: Set MEV bit in nested STE for DoS mitigations")
> Cc: stable at vger.kernel.org
> Signed-off-by: Jason Gunthorpe <jgg at nvidia.com>
> Reviewed-by: Shuai Xue <xueshuai at linux.alibaba.com>
> Signed-off-by: Nicolin Chen <nicolinc at nvidia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
Reviewed-by: Mostafa Saleh <smostafa at google.com>
Thanks,
Mostafa
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 8dbf4ad5b51e..12a9669bcc83 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -1085,6 +1085,16 @@ EXPORT_SYMBOL_IF_KUNIT(arm_smmu_get_ste_used);
> VISIBLE_IF_KUNIT
> void arm_smmu_get_ste_update_safe(__le64 *safe_bits)
> {
> + /*
> + * MEV does not meaningfully impact the operation of the HW, it only
> + * changes how many fault events are generated, thus we can relax it
> + * when computing the ordering. The spec notes the device can act like
> + * MEV=1 anyhow:
> + *
> + * Note: Software must expect, and be able to deal with, coalesced
> + * fault records even when MEV == 0.
> + */
> + safe_bits[1] |= cpu_to_le64(STRTAB_STE_1_MEV);
> }
> EXPORT_SYMBOL_IF_KUNIT(arm_smmu_get_ste_update_safe);
>
> --
> 2.43.0
>
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