[PATCH 23/32] KVM: arm64: gic-v5: Bump arch timer for GICv5

[Sascha Bischoff]

On Mon, 2025-12-15 at 15:50 +0000, Marc Zyngier wrote:
> On Fri, 12 Dec 2025 15:22:43 +0000,
> Sascha Bischoff <Sascha.Bischoff at arm.com> wrote:
> > 
> > Now that GICv5 has arrived, the arch timer requires some TLC to
> > address some of the key differences introduced with GICv5.
> > 
> > For PPIs on GICv5, the set_pending_state and queue_irq_unlock
> > irq_ops
> > are used as AP lists are not required at all for GICv5. The arch
> > timer
> > also introduces an irq_op - get_input_level. Extend the
> > arch-timer-provided irq_ops to include the two PPI ops for vgic_v5
> > guests.
> > 
> > When possible, DVI (Direct Virtual Interrupt) is set for PPIs when
> > using a vgic_v5, which directly inject the pending state in to the
> > guest. This means that the host never sees the interrupt for the
> > guest
> > for these interrupts. This has two impacts.
> > 
> > * First of all, the kvm_cpu_has_pending_timer check is updated to
> >   explicitly check if the timers are expected to fire.
> > 
> > * Secondly, for mapped timers (which use DVI) they must be masked
> > on
> >   the host prior to entering a GICv5 guest, and unmasked on the
> > return
> >   path. This is handled in set_timer_irq_phys_masked.
> > 
> > The final, but rather important, change is that the architected
> > PPIs
> > for the timers are made mandatory for a GICv5 guest. Attempts to
> > set
> > them to anything else are actively rejected. Once a vgic_v5 is
> > initialised, the arch timer PPIs are also explicitly reinitialised
> > to
> > ensure the correct GICv5-compatible PPIs are used - this also adds
> > in
> > the GICv5 PPI type to the intid.
> > 
> > Signed-off-by: Sascha Bischoff <sascha.bischoff at arm.com>
> > ---
> >  arch/arm64/kvm/arch_timer.c     | 114 +++++++++++++++++++++++++++-
> > ----
> >  arch/arm64/kvm/vgic/vgic-init.c |   9 +++
> >  arch/arm64/kvm/vgic/vgic-v5.c   |   6 +-
> >  include/kvm/arm_arch_timer.h    |   7 +-
> >  include/kvm/arm_vgic.h          |   5 ++
> >  5 files changed, 119 insertions(+), 22 deletions(-)
> > 
> > diff --git a/arch/arm64/kvm/arch_timer.c
> > b/arch/arm64/kvm/arch_timer.c
> > index 6f033f6644219..b0a5a6c6bf8da 100644
> > --- a/arch/arm64/kvm/arch_timer.c
> > +++ b/arch/arm64/kvm/arch_timer.c
> > @@ -56,6 +56,17 @@ static struct irq_ops arch_timer_irq_ops = {
> >  	.get_input_level = kvm_arch_timer_get_input_level,
> >  };
> >  
> > +static struct irq_ops arch_timer_irq_ops_vgic_v5 = {
> > +	.get_input_level = kvm_arch_timer_get_input_level,
> > +	.set_pending_state = vgic_v5_ppi_set_pending_state,
> > +	.queue_irq_unlock = vgic_v5_ppi_queue_irq_unlock,
> > +};
> > +
> > +static bool vgic_is_v5(struct kvm_vcpu *vcpu)
> > +{
> > +	return vcpu->kvm->arch.vgic.vgic_model ==
> > KVM_DEV_TYPE_ARM_VGIC_V5;
> > +}
> > +
> 
> Drive-by comment: you also have
> 
> arch/arm64/kvm/vgic/vgic.h:static inline bool vgic_is_v5(struct kvm
> *kvm)
> include/kvm/arm_vgic.h:#define gic_is_v5(k) ((k)-
> >arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V5)
> 
> At least two of them have to die.
> 
> 	M.
> 
Agreed. This has been addressed in conjunction with your int type
helper suggestions. We're now back to having ONE way of checking if the
vgic is v5.

Thanks,
Sascha