[PATCH RFC 0/4] Support multi-channel IRQs in stmmac platform drivers

[Andrew Lunn]

On Sun, Dec 14, 2025 at 11:15:36PM +0100, Jan Petrous via B4 Relay wrote:
> The stmmac core supports two interrupt modes, controlled by the
> flag STMMAC_FLAG_MULTI_MSI_EN.
> - When the flag is set, the driver uses multi-channel IRQ mode (multi-IRQ).
> - Otherwise, a single IRQ line is requested:
> 
> static int stmmac_request_irq(struct net_device *dev)
> {
>         /* Request the IRQ lines */
>         if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN)
>                 ret = stmmac_request_irq_multi_msi(dev);
>         else
>                 ret = stmmac_request_irq_single(dev);
> }
> 
> At present, only PCI drivers (Intel and Loongson) make use of the multi-IRQ
> mode. This concept can be extended to DT-based embedded glue drivers
> (dwmac-xxx.c).
> 
> This series adds support for reading per-channel IRQs from the DT node and
> reuses the existing STMMAC_FLAG_MULTI_MSI_EN flag to enable multi-IRQ
> operation in platform drivers.
> 
> NXP S32G2/S32G3/S32R SoCs integrate the DWMAC IP with multi-channel
> interrupt support. The dwmac-s32.c driver change is provided as an example of
> enabling multi-IRQ mode for non-PCI drivers.
> 
> An open question remains: should platform drivers support both single-IRQ
> and multi-IRQ modes, or should multi-IRQ be required with the DT node
> specifying all channel interrupts? The current RFC implementation follows
> the latter approach — dwmac-s32 requires IRQs to be defined for all
> channels.

You need to consider backwards compatibility. Will an old DT blob
continue to work after this change?

	Andrew