Issues with DRM_ACCEL_ROCKET (Oops, power-domain, probe-ordering)

[Tomeu Vizoso]

On Wed, Dec 10, 2025 at 11:47 AM Chaoyi Chen <chaoyi.chen at rock-chips.com> wrote:
>
> Hello Tomeu,
>
> On 12/10/2025 2:50 PM, Tomeu Vizoso wrote:
> > On Tue, Dec 9, 2025 at 10:31 AM Chaoyi Chen <chaoyi.chen at rock-chips.com> wrote:
> >>
> >> Hello Tomeu,
> >>
> >> On 12/9/2025 2:55 PM, Tomeu Vizoso wrote:
> >>> On Tue, Dec 2, 2025 at 8:00 AM Chaoyi Chen <chaoyi.chen at rock-chips.com> wrote:
> >>
> >> [...]
> >>
> >>>
> >>> This need was questioned during the review process, and during my
> >>> stress testing I didn't find a need for core 0 to be treated
> >>> specially. So it was considered unneeded complexity and the code was
> >>> dropped.
> >>>
> >>
> >> Oh, I just noticed that the commit comment in the devicetree still
> >> contains a relevant description.
> >>
> >>> My testing involves running the supported models as a whole, and also
> >>> their individual operations as individual tests. I run them in 8
> >>> parallel processes, in batches so we have continuous bring up and down
> >>> of clients.
> >>>
> >>> I'm a bit surprised that that testing worked stably but we have still
> >>> failures in some setups.
> >>
> >> Could you please describe the failures that still exist? Thank you.
> >
> > I was referring to the ones that Quentin reported when starting this thread.
> >
>
> I believe this pmdomain patch can alleviate some of the problems [0].
>
> However, the problem Quentin mentioned still exists. For example, if
> there is an invalid device on core0, while core1 and core2 are valid,
> accessing the relevant data on core0 will cause problems. Quentin's
> patch can fix this, but he doesn't seem to have time for it lately...

Has anybody reproduced this problem with the pmdomain fix applied?

Thanks,

Tomeu

> [0] https://lore.kernel.org/all/20251205064739.20270-1-rmxpzlb@gmail.com/
>
> > Regards,
> >
> > Tomeu
> >
> >
>
> --
> Best,
> Chaoyi