[PATCH] ARM: fix input-only operand modification in load_unaligned_zeropad()

[Russell King (Oracle)]

On Thu, Nov 27, 2025 at 10:58:48AM +0800, Liyuan Pang wrote:
> In the inline assembly inside load_unaligned_zeropad(), the "addr" is
> constrained as input-only operand. The compiler assumes that on exit
> from the asm statement these operands contain the same values as they
> had before executing the statement, but when kernel page fault happened,
> the assembly fixup code "bic %2 %2, #0x3" modify the value of "addr",
> which may lead to an unexpected behavior.
> 
> Use a temporary variable "tmp" to handle it, instead of modifying the
> input-only operand, just like what arm64's load_unaligned_zeropad()
> does.
> 
> Fixes: b9a50f74905a ("ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs")
> 
> Co-developed-by: Xie Yuanbin <xieyuanbin1 at huawei.com>
> Signed-off-by: Xie Yuanbin <xieyuanbin1 at huawei.com>
> Signed-off-by: Liyuan Pang <pangliyuan1 at huawei.com>

Sorry, I missed this email in the deluge. This looks entirely correct.
Please submit this to the patch system. Details in the signature below.
Thanks.

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