[PATCH v6 00/34] arm_mpam: Add basic mpam driver
Reinette Chatre
reinette.chatre at intel.com
Fri Dec 5 11:11:34 PST 2025
Hi Punit,
On 12/5/25 5:08 AM, Punit Agrawal wrote:
> James Morse <james.morse at arm.com> writes:
>> On 03/12/2025 11:21, Punit Agrawal wrote:
>>> Ben Horgan <ben.horgan at arm.com> writes:
>>>> On 11/24/25 15:21, Punit Agrawal wrote:
>>>>> The platform has MSCs attached
>>>>> to shared L2 caches which are being skipped during later stages of
>>>>> initialisation. IIUC, the L2 MSCs' limitations stems from the
>>>>> assumptions in the resctrl interface.
>>>>
>>>> What in particualar is being skipped?
>>
>>> The registration of the discovered MSCs with resctrl and subsequent
>>> exposing it to the user.
>>
>> resctrl's 'L2' support is limited to the CPOR bitmap.
>> If you have controls, there is no resctrl 'event' that can exposed them.
>> (the problem being they all have 'L3' in the name!)
>
>>>>> I was wondering if there are any patches available to relax these
>>>>> limitations?
>
>> Knowing which property it is will help - but some of these things are checked
>> to match resctrl's ABI. They can't necessarily be relaxed without breaking
>> user-space.
>
> This platform has portion, capacity and priority partitioning, as well
> as memory bandwidth and cache storage monitoring. The MPAM code seems to
> correctly parse the properties.
>
> But as you point out, the resctrl 'L2' support doesn't have anything
> other than CPOR bitmap yet. Have you looked at what's needed to extend
> resctrl to support some of the others?
Please see [1] for a summary of ideas on how resctrl can support multiple
controls. Nothing is final, please do add your ideas and requirements.
There are a couple of opens not included in the summary. If interested
[2] is where a lot of discussion happened that prompted the need for
a summary.
Reinette
[1] https://lore.kernel.org/lkml/aPtfMFfLV1l%2FRB0L@e133380.arm.com/
[2] https://lore.kernel.org/lkml/aNFliMZTTUiXyZzd@e133380.arm.com/
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