[PATCH v7 5/7] arm64: Add support for FEAT_{LS64, LS64_V}

Arnd Bergmann arnd at arndb.de
Thu Dec 4 23:09:18 PST 2025


On Fri, Dec 5, 2025, at 07:47, Zhou Wang wrote:
> On 2025/11/27 23:37, Arnd Bergmann wrote:
>> On Thu, Nov 27, 2025, at 04:51, Zhou Wang wrote:
>> 
>> As I understand it, using ST64B is usually more efficient than
>> ST64BV if you can use either, since it is a normal posted bus
>> transaction rather than a synchronous atomic. If that works for
>> you, I think what we should plan for is to let you use ST64B
>> on this particular hardware and never support ST64BV from
>> userspace, the same way we do it on Intel hardware with ENQCMD.
>
> I missed the email as it has been filtered into other fold, my bad :(
> I think it works fine in our system. I planned to remove whole ST64BV
> support in next version, so what you suggested is not to export
> ST64BV to userspace?

Exactly: In line with how this works on x86, we'd always use
ST64B for userspace access to dedicated workqueues, or ST64BV0
for shared hardware workqueues, while ST64BV remains reserved
for in-kernel users.

>> As there are already CPUs out there that do include ST64BV0,
>> I think we also want to support those soon. Not having to
>> support both ST64BV and ST64BV0 from userspace makes it a lot
>> easier, but I think we'd still want to only enable ST64BV0
>> on a per-task base when mapping a shared workqueued into the
>> user address space on a task that has an active mm->iommu_mm.
>> 
>> If that makes sense to you, I can try to come up with a
>> prototype based on your current patches to add the context
>> switching and enable logic.
>
> I am OK with this, even though currently we do not have a real
> hardware to test ST64BV0 related codes.

Thanks for confirming!

        Arnd



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