[PATCH v6 6/9] dt-bindings: arm: add an interrupt property for Coresight CTCU
Jie Gan
jie.gan at oss.qualcomm.com
Thu Dec 4 17:01:35 PST 2025
On 12/4/2025 5:22 PM, Suzuki K Poulose wrote:
> On 04/12/2025 02:53, Jie Gan wrote:
>>
>>
>> On 12/4/2025 2:14 AM, Suzuki K Poulose wrote:
>>> On 08/09/2025 03:01, Jie Gan wrote:
>>>> Add an interrupt property to CTCU device. The interrupt will be
>>>> triggered
>>>> when the data size in the ETR buffer exceeds the threshold of the
>>>> BYTECNTRVAL register. Programming a threshold in the BYTECNTRVAL
>>>> register
>>>> of CTCU device will enable the interrupt.
>>>>
>>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
>>>> Signed-off-by: Jie Gan <jie.gan at oss.qualcomm.com>
>>>> ---
>>>> .../devicetree/bindings/arm/qcom,coresight-ctcu.yaml | 17 +++++
>>>> + + ++++++++++
>>>> 1 file changed, 17 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-
>>>> ctcu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-
>>>> ctcu.yaml
>>>> index 843b52eaf872..ea05ad8f3dd3 100644
>>>> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
>>>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
>>>> @@ -39,6 +39,16 @@ properties:
>>>> items:
>>>> - const: apb
>>>> + interrupts:
>>>> + items:
>>>> + - description: Byte cntr interrupt for etr0
>>>> + - description: Byte cntr interrupt for etr1
>>>> +
>>>> + interrupt-names:
>>>> + items:
>>>> + - const: etr0
>>>> + - const: etr1
>>>
>>
>> Hi Suzuki,
>>
>>> Why are they named "etr0" "etr1" ? That would be confusing, isn't it,
>>> especially with the Linux driver naming things randomly for the TMC-
>>> ETRs.
>>>
>>
>> Yes, it will cause misunderstandings since the "etr0" here may not the
>> right device we are expecting.
>>
>>>
>>> What we want is the "port" number corresponding to the "TMC-ETR" being
>>> monitored ?
>>>
>>> Have you explored other options, "port-0", "port-1" ?
>>>
>>
>> I think it's much better. Will update in next version.
>
> I am not sure if there exists a better scheme for identifying or
> numbering the interrupts. Happy to listen to the DT experts.
>
> Rob, Krzysztof, thoughts ?
>
Hi Suzuki,
I was thinking how about the name "ETRIRQ0", "ETRIRQ1" etc...
Thanks,
Jie
> Suzuki
>
>
>>
>> Thanks,
>> Jie
>>
>>> Suzuki
>>>
>>>> +
>>>> in-ports:
>>>> $ref: /schemas/graph.yaml#/properties/ports
>>>> @@ -56,6 +66,8 @@ additionalProperties: false
>>>> examples:
>>>> - |
>>>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>>>> +
>>>> ctcu at 1001000 {
>>>> compatible = "qcom,sa8775p-ctcu";
>>>> reg = <0x1001000 0x1000>;
>>>> @@ -63,6 +75,11 @@ examples:
>>>> clocks = <&aoss_qmp>;
>>>> clock-names = "apb";
>>>> + interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>,
>>>> + <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>;
>>>> + interrupt-names = "etr0",
>>>> + "etr1";
>>>> +
>>>> in-ports {
>>>> #address-cells = <1>;
>>>> #size-cells = <0>;
>>>>
>>>
>>>
>>
>
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