[PATCH v3 4/9] KVM: arm64: Handle FEAT_IDST for sysregs without specific handlers
Joey Gouly
joey.gouly at arm.com
Thu Dec 4 02:52:30 PST 2025
On Thu, Dec 04, 2025 at 09:48:01AM +0000, Marc Zyngier wrote:
> Add a bit of infrastrtcture to triage_sysreg_trap() to handle the
> case of registers falling into the Feature ID space that do not
> have a local handler.
>
> For these, we can directly apply the FEAT_IDST semantics and inject
> an EC=0x18 exception. Otherwise, an UNDEF will do.
>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
> arch/arm64/kvm/emulate-nested.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
> index 616eb6ad68701..fac2707221b47 100644
> --- a/arch/arm64/kvm/emulate-nested.c
> +++ b/arch/arm64/kvm/emulate-nested.c
> @@ -2588,6 +2588,26 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)
>
> params = esr_sys64_to_params(esr);
>
> + /*
> + * This implements the pseudocode UnimplementedIDRegister()
> + * helper for the purpose of fealing with FEAT_IDST.
*dealing
> + *
> + * The Feature ID space is defined as the System register
> + * space in AArch64 with op0==3, op1=={0, 1, 3}, CRn==0,
> + * CRm=={0-7}, op2=={0-7}.
> + */
> + if (params.Op0 == 3 &&
> + !(params.Op1 & 0b100) && params.Op1 != 2 &&
> + params.CRn == 0 &&
> + !(params.CRm & 0b1000)) {
> + if (kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR2_EL1, IDS, IMP))
> + kvm_inject_sync(vcpu, kvm_vcpu_get_esr(vcpu));
> + else
> + kvm_inject_undefined(vcpu);
> +
> + return true;
> + }
> +
> /*
> * Check for the IMPDEF range, as per DDI0487 J.a,
> * D18.3.2 Reserved encodings for IMPLEMENTATION
> --
> 2.47.3
>
Reviewed-by: Joey Gouly <joey.gouly at arm.com>
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