[External] Re: [PATCH v3 5/8] riscv: smp: use NMI for CPU stop

[yunhui cui]

Hi Radim,

On Thu, Dec 4, 2025 at 12:07 PM Radim Krčmář <rkrcmar at ventanamicro.com> wrote:
>
> 2025-11-27T20:53:02+08:00, Yunhui Cui <cuiyunhui at bytedance.com>:
> > Use NMI instead of IPI for CPU stop if RISC-V SSE NMI is supported.
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui at bytedance.com>
> > ---
> > diff --git a/drivers/firmware/riscv/riscv_sse_nmi.c b/drivers/firmware/riscv/riscv_sse_nmi.c
> > @@ -58,6 +58,7 @@ static int local_nmi_handler(u32 evt, void *arg, struct pt_regs *regs)
> >       type = atomic_read(this_cpu_ptr(&local_nmi));
> >
> >       NMI_HANDLE(LOCAL_NMI_CRASH, cpu_crash_stop, cpu, regs);
> > +     NMI_HANDLE(LOCAL_NMI_STOP, cpu_stop);
>
> Please document the intended preemption design for all SSE events,
> because it will be a nightmare if we forget some assumptions in the
> coming years.  (That includes the relative priorities of RAS/PMU/...)

Actually, LOCAL_NMI_CRASH, LOCAL_NMI_STOP, LOCAL_NMI_BACKTRACE,
LOCAL_NMI_KGDB, ... are all implemented via the single SSE event
SBI_SSE_EVENT_LOCAL_SOFTWARE_INJECTED. Per the SSE design, no
preemption will occur among CRASH, STOP, BACKTRACE, and KGDB events.

>
> Thanks.

Thanks,
Yunhui