On 12/2/25 11:26 AM, Taniya Das wrote: > Add clock ops for Rivian ELU PLL, add the register offsets for supporting > the PLL. > > Signed-off-by: Taniya Das <taniya.das at oss.qualcomm.com> > --- Matches downstream Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com> Konrad