[PATCH v6 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions
Nihal Kumar Gupta
quic_nihalkum at quicinc.com
Mon Dec 1 23:35:35 PST 2025
On 11/26/25 9:10 AM, Vikram Sharma wrote:
>> From: Nihal Kumar Gupta <quic_nihalkum at quicinc.com>
>>
>> Qualcomm QCS8300 SoC contains three Camera Control Interface (CCI).
>> Compared to Lemans, the key difference is in SDA/SCL GPIO assignments
>> and number of CCIs.
> [...]
>
>> @@ -5071,6 +5182,240 @@ tlmm: pinctrl at f100000 {
>> #interrupt-cells = <2>;
>> wakeup-parent = <&pdc>;
>>
>> + cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
>> + pins = "gpio73";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
> I'm not sure whether I was unclear, but my intention was to ask you to move the MCLK pin definitions to the SoC DTSI, because that comes from the design of the platform and doesn't vary between end products.
>
> GPIO_73 being related to a voltage regulator is strictly a property of the EVK.
MCLK pin definitions are already present under the tlmm block in SoC dtsi(monaco.dtsi) as required by the pinctrl subsystem(qcom,qcs8300-tlmm.yaml).
Are you suggesting they shouldn’t be part of TLMM in the SoC DTSI? This doesn’t align with the YAML file.
Regarding GPIO_73: Noted. I will move it to monaco-evk.dts under the tlmm section.
Below are the example snippets:
In monaco.dtsi (SoC level):
tlmm: pinctrl at ... {
cam_mclk0_default: cam-mclk0-default-state {
pins = "gpio67";
function = "cam_mclk";
drive-strength = <2>;
};
....
};
In monaco-evk.dts (Board level):
&tlmm {
cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
pins = "gpio73";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
...
};
--
Regards,
Nihal Kumar Gupta
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