[PATCH v1 6/7] ARM: dts: rockchip: Add D-PHY for RK3368

[Heiko Stübner]

Am Sonntag, 31. August 2025, 12:48:54 Mitteleuropäische Sommerzeit schrieb WeiHao Li:
> RK3368 has a InnoSilicon D-PHY which supports DSI/LVDS/TTL with maximum
> trasnfer rate of 1 Gbps per lane.
> 
> Signed-off-by: WeiHao Li <cn.liweihao at gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3368.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index 0e47bf59a..674a3676d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -884,6 +884,20 @@ display_subsystem: display-subsystem {
>  		status = "disabled";
>  	};
>  
> +	video_phy: video-phy at ff968000 {

I think the node should be something like
dsi_dphy: phy at ff968000


> +		compatible = "rockchip,rk3368-dsi-dphy";
> +		reg = <0x0 0xff968000 0x0 0x4000>,
> +		      <0x0 0xff960000 0x0 0x4000>;
> +		clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>,
> +			 <&cru PCLK_MIPI_DSI0>;
> +		clock-names = "ref", "pclk", "pclk_host";
> +		#clock-cells = <0>;
> +		resets = <&cru SRST_MIPIDPHYTX>;
> +		reset-names = "apb";
> +		#phy-cells = <0>;
> +		status = "disabled";
> +	};
> +
>  	hevc_mmu: iommu at ff9a0440 {
>  		compatible = "rockchip,iommu";
>  		reg = <0x0 0xff9a0440 0x0 0x40>,
>