[PATCH 1/4] dt-bindings: hwinfo: Add second register range for GP_SW
Krzysztof Kozlowski
krzk at kernel.org
Thu Aug 7 01:22:19 PDT 2025
On 06/08/2025 17:24, Judith Mendez wrote:
> Hi Krystoff,
That's not really my name. I know it is tricky to type, so it's enough
to say Hi.
>>>
>>> reg:
>>> - maxItems: 1
>>> + maxItems: 2
>>> + minItems: 1
>>
>> They always come with reversed order... but anyway, you instead must
>> list the items with minItems.
>>
>> another problem is that this is not supposed to be per register. I
>> already complained more than once about some of TI bindings: stop
>> creating device nodes or address spaces per register.
>>
>> That's one address space.
>
> That does not really make sense. Registers jtag vs gp_sw have a
> different back-end, one from silicon and another from efuse. Not even
How does the datasheet describe this address space(s) (not registers,
address space)?
> sure if the memory map will always be the same across processors.
>
>>
Best regards,
Krzysztof
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