[PATCH] arm64: dts: renesas: r8a779g3: Update thermal trip points on V4H Sparrow Hawk
Geert Uytterhoeven
geert at linux-m68k.org
Wed Aug 6 02:35:19 PDT 2025
Hi Marek,
On Wed, 25 Jun 2025 at 12:03, Marek Vasut
<marek.vasut+renesas at mailbox.org> wrote:
> Since the Sparrow Hawk has a smaller PCB than the White Hawk, it tends
> to generate more heat. To prevent potential damage to the board, adjust
> the temperature trip points.
>
> Add four "passive" trip points which increasingly throttle the CPU to
> prevent overheating. The first trip point at 68°C disables the 1.8 GHz
> and 1.7 GHz modes and limits the CPU to 1.5 GHz frequency. The second
> trip point at 72°C disables the 1.5 GHz mode and limits the CPU to 1.0
> GHz frequency. The third trip point at 76°C uses thermal-idle to start
> inserting idle cycles into the CPU instruction stream to cool the CPU
> cores down. The fourth and last trip point at 80°C disables the 1.0 GHz
> mode and limits the CPU to 500 MHz frequency.
>
> In case the SoC heats up further, in case either of the thermal sensors
> readings passes the 100°C, a thermal shutdown is triggered to prevent
> any damage to the hardware.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts
> @@ -38,6 +38,7 @@
>
> /dts-v1/;
> #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> #include "r8a779g3.dtsi"
>
> @@ -797,3 +798,139 @@ &rwdt {
> &scif_clk { /* X12 */
> clock-frequency = <24000000>;
> };
> +
> +/* thermal-idle cooling for all SoC cores */
> +&a76_0 {
Please keep nodes sorted (alphabetically by label).
> + #cooling-cells = <2>;
This is only present for the first CPU core, and map{0,1,3} refer
only to a76_0, because all four CPU cores are driven by a single clock
(Z0), right?
> +
> + a76_0_thermal_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <10000>;
> + exit-latency-us = <500>;
> + };
> +};
> +/* THS sensor in SoC near CA76 cores does more progressive cooling. */
> +&sensor_thermal_ca76 {
> + critical-action = "shutdown";
> +
> + cooling-maps {
> + /*
> + * The cooling-device minimum and maximum parameters inversely
> + * match opp-table-0 {} node entries in r8a779g0.dtsi, in other
> + * words, 0 refers to 1.8 GHz OPP and 4 refers to 500 MHz OPP.
> + * This is because they refer to cooling levels, where maximum
> + * cooling level happens at 500 MHz OPP, when the CPU core is
> + * running slowly and therefore generates least heat.
That applies to cooling-device = <&a76_[0-3] ...>...
> + */
> + map0 {
> + /* At 68C, inhibit 1.7 GHz and 1.8 GHz modes */
> + trip = <&sensor3_passive_low>;
> + cooling-device = <&a76_0 2 4>;
> + contribution = <128>;
> + };
> +
> + map1 {
> + /* At 72C, inhibit 1.5 GHz mode */
> + trip = <&sensor3_passive_mid>;
> + cooling-device = <&a76_0 3 4>;
> + contribution = <256>;
> + };
> +
> + map2 {
> + /* At 76C, start injecting idle states */
> + trip = <&sensor3_passive_hi>;
> + cooling-device = <&a76_0_thermal_idle 0 80>,
> + <&a76_1_thermal_idle 0 80>,
> + <&a76_2_thermal_idle 0 80>,
> + <&a76_3_thermal_idle 0 80>;
... but what do "0 80" refer to? I couldn't find in the thermal-idle
bindings what exactly are the minimum and maximum cooling states here.
> + contribution = <512>;
> + };
The rest LGTM, so with the sort order fixed, and the thermal-idle
states clarified:
Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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