[PATCH v2 2/3] spi: dt-bindings: atmel,at91rm9200-spi: Add support for optional 'spi_gclk' clock

[Manikandan.M at microchip.com]

Hi Krzysztof,

On 01/08/25 2:45 pm, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 01/08/2025 05:36, Manikandan.M at microchip.com wrote:
>> Hi Krzysztof,
>>
>> On 30/07/25 4:51 pm, Krzysztof Kozlowski wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On 30/07/2025 12:10, Manikandan Muralidharan wrote:
>>>> Update the Atmel SPI DT binding to support an optional programmable
>>>> SPI generic clock 'spi_gclk', in addition to the required 'spi_clk'.
>>>>
>>>> Signed-off-by: Manikandan Muralidharan <manikandan.m at microchip.com>
>>>> ---
>>>> changes in v2:
>>>>    - Fixed mail threading
>>>
>>> You already received comments. Respond to them instead of sending again
>>> the same.
>>>
>>
>> I have re-submitted the series so that patch 3/3 includes a clear
>> explanation of this change for the benefit of a wider audience.
>> Apologies if this patch also requires a brief explanation—please let me
>> know if I should include it here.
> 
> I do not see you addressed any comments. There are no changes here
> except threading. Look at your changelog:
> 
My apologies — I’ll provide the explanation for the GCLK change in patch 
2/3 and submit v3.

"The Atmel SPI controller supports both the peripheral clock and the 
Generic Clock (GCLK) as sources for SPCK generation. On platforms like 
the SAM9X7 SoC, the peripheral clock can reach frequencies up to 
266 MHz. This may exceed the maximum value supported by the Serial Clock 
Baud Rate (SCBR) divider, leading to SPI transfer failures. In such 
cases, the GCLK can be used as an alternative source for SPCK generation"

> changes in v2:
>     - Fixed mail threading
> 
> Best regards,
> Krzysztof

-- 
Thanks and Regards,
Manikandan M.