[PATCH v3 09/42] arm64: sysreg: Add registers trapped by HDFG{R,W}TR2_EL2

[Ben Horgan]

Hi Marc,

On 4/26/25 13:28, Marc Zyngier wrote:
> +Sysreg	SPMCR_EL0	2	3	9	12	0
> +Res0	63:12
> +Field	11	TRO
> +Field	10	HDBG
> +Field	9	FZO
> +Field	8	NA
> +Res0	7:5	
Nit: Trailing whitespace. There are a few other places on Res0 lines. 
Maybe your generation script could be tweaked.

Thanks,

Ben