[PATCH v3 1/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: add ACSPCIE0 node

[Kumar, Udit]

On 4/22/2025 6:02 PM, Siddharth Vadapalli wrote:
> The ACSPCIE0 module on TI's J784S4 SoC is capable of driving the
> reference clock required by the PCIe Endpoint device. It is an
> alternative to on-board and external reference clock generators.
> Add the device-tree node for the same.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
> ---
>
> The previous versions of this series were a single patch. Based on the
> feedback received on previous versions, the SoC and Board support has
> been split in order to allow reuse for other Boards based on the same
> SoC.
>
> v2 patch:
> https://lore.kernel.org/r/20250411121307.793646-1-s-vadapalli@ti.com/
> Changes since v2 patch:
> - The SoC and board changes have been split across:
>    k3-j784s4-j742s2-main-common.dtsi and k3-j784s4-j742s2-evm-common.dtsi
>    respectively.
>
> Regards,
> Siddharth.
>
>   arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> index 1944616ab357..f03b2b6d5d03 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
> @@ -126,6 +126,11 @@ audio_refclk1: clock at 82e4 {
>   			assigned-clock-parents = <&k3_clks 157 63>;
>   			#clock-cells = <0>;
>   		};
> +
> +		acspcie0_proxy_ctrl: clock-controller at 1a090 {
> +			compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";
> +			reg = <0x1a090 0x4>;

Reviewed-by: Udit Kumar <u-kumar1 at ti.com>


> +		};
>   	};
>   
>   	main_ehrpwm0: pwm at 3000000 {