[PATCH v2 7/7] arm64: dts: ti: k3-j784s4-j742s2-main-common: switch to 64-bit address space for PCIe0 and PCIe1
Kumar, Udit
u-kumar1 at ti.com
Tue Apr 22 21:07:39 PDT 2025
On 4/22/2025 5:30 PM, Siddharth Vadapalli wrote:
> The PCIe0 and PCIe1 instances of PCIe in J742S2 and J784S4 SoCs support:
> 1. 128 MB address region in the 32-bit address space
> 2. 4 GB address region in the 64-bit address space
>
> The default configuration is that of a 128 MB address region in the
> 32-bit address space. While this might be sufficient for most use-cases,
> it is insufficient for supporting use-cases which require larger address
> spaces. Therefore, switch to using the 64-bit address space with a 4 GB
> address region.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
> ---
>
> [..]
> + <0x02000000 0x00 0x00101000 0x41 0x00101000 0x00 0xffeff000>; /* 32-bit Non-Prefetchable MEM (4 GB - 1 MB - 4 KB) */
Reviewed-by: Udit Kumar <u-kumar1 at ti.com>
> dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
> status = "disabled";
> };
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