[PATCH v3 0/2] J784S4/J742S2: Enable ACSPCIE0 output for PCIe1

[Siddharth Vadapalli]

Hello,

This series enables the reference clock output from the ACSPCIE0 module
to the PCIe Connector corresponding to the PCIe1 instance of PCIe on
J784S4-EVM and J742S2-EVM.

Series is based on linux-next tagged next-20250417.

The previous versions of this series were a single patch. Based on the
feedback received on previous versions, the SoC and Board support has
been split in order to allow reuse for other Boards based on the same
SoC.

v2 patch:
https://lore.kernel.org/r/20250411121307.793646-1-s-vadapalli@ti.com/
Changes since v2 patch:
- The SoC and board changes have been split across:
  k3-j784s4-j742s2-main-common.dtsi and k3-j784s4-j742s2-evm-common.dtsi
  respectively.

v1 patch:
https://lore.kernel.org/r/20240715123301.1184833-1-s-vadapalli@ti.com/
Changes since v1 patch:
- Rebased patch on linux-next tagged next-20241209.
- Moved changes from "k3-j784s4-main.dtsi" to its equivalent now which
  is "k3-j784s4-j742s2-main-common.dtsi" since PCIe1 is common to both
  J742S2 and J784S4.
- Renamed "acspcie0-proxy-ctrl" to "clock-controller" to follow generic
  node naming convention.
- Added "ti,syscon-acspcie-proxy-ctrl" property at the end of the node
  since vendor specific properties should be placed at the end.

Logs validating that an NVMe SSD connected to the PCIe Connector on
J784S4-EVM receives the reference clock from the ACSPCIE0 module and is
therefore enumerated successfully:
https://gist.github.com/Siddharth-Vadapalli-at-TI/905bceb2b6c0e1fc6b80cd2ddaf5bd0e

Regards,
Siddharth.

Siddharth Vadapalli (2):
  arm64: dts: ti: k3-j784s4-j742s2-main-common: add ACSPCIE0 node
  arm64: dts: ti: k3-j784s4-j742s2-evm-common: enable ACSPCIE0 output
    for PCIe1

 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi  | 6 ++++++
 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 5 +++++
 2 files changed, 11 insertions(+)

-- 
2.34.1