[PATCH v3 2/3] arm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x
Kumar, Udit
u-kumar1 at ti.com
Sat Apr 19 21:38:18 PDT 2025
Hello Dominik,
Thanks for patch.
Few minor feedback
On 4/17/2025 6:29 PM, Dominik Haller wrote:
> The phyCORE-AM68x/TDA4x [1] is a SoM (System on Module) featuring TI's
> AM68x/TDA4x SoC. It can be used in combination with different carrier
> boards. This module can come with different sizes and models for DDR,
> eMMC, SPI NOR Flash and various SoCs from the AM68x/TDA4x (J721S2) family.
>
> A reference carrier board design, called phyBOARD-Izar is used for the
> phyCORE-AM68x/TDA4x development kit [2].
>
> Supported features:
> * Debug UART
> * 2x SPI NOR Flash
> * eMMC
> * 2x Ethernet
> * Micro SD card
> * I2C EEPROM
> * I2C RTC
> * 2x I2C GPIO Expander
> * LEDs
> * USB 5 Gbit/s
> * PCIe
>
> For more details see the product pages for the SoM and the
> development kit:
>
> [1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
> [2] https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/
>
> Signed-off-by: Dominik Haller <d.haller at phytec.de>
> Acked-by: Moteen Shah <m-shah at ti.com>
> ---
>
> Notes:
> Bootlog:
> https://gist.github.com/dominiknh90/644e753c752b232117e12092e3691124
>
> Link to v2:
> https://lore.kernel.org/linux-arm-kernel/20250415130458.33714-1-d.haller@phytec.de/
>
> Link to v1:
> https://lore.kernel.org/linux-arm-kernel/20250411101004.13276-1-d.haller@phytec.de/
>
> Changes in v3:
> - added phytec,am68-phycore-som compatible
> - pickup up Acked-by: Moteen Shah
>
> Changes in v2:
> - aliases reordered
> - stdout-path set to &main_uart8
> - fixed coding style in serdes0 node
> - dropped whitespaces in commit message
>
> arch/arm64/boot/dts/ti/Makefile | 1 +
> .../boot/dts/ti/k3-am68-phyboard-izar.dts | 579 +++++++++++++++++
> .../boot/dts/ti/k3-am68-phycore-som.dtsi | 594 ++++++++++++++++++
> 3 files changed, 1174 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
> create mode 100644 arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 03d4cecfc001..3f18ca4029c3 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -109,6 +109,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk-csi2-dual-imx219.dtbo
>
> [..]
> +
> +&wkup_pmx1 {
> + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
> + J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
> + J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
> + J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
> + J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
> + J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
> + >;
Please have bootph-all in case, this is boot device
> [..]
> +
> + wkup_uart0_pins_default: wkup-uart0-default-pins {
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */
> + J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */
> + J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
> + J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
> + >;
> + bootph-all;
Since this is shared with TIFS fw (debug prints), then i suggest not to
have flow control on this UART
> + };
> +};
> +
> [..]
> +
> +&ospi1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
> + status = "okay";
> +
> + flash at 0 {
> + compatible = "jedec,spi-nor";
> + reg = <0x0>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + spi-max-frequency = <40000000>;
> + cdns,tshsl-ns = <60>;
> + cdns,tsd2d-ns = <60>;
> + cdns,tchsh-ns = <60>;
> + cdns,tslch-ns = <60>;
> + cdns,read-delay = <2>;
Bootph-all here
> + };
> [..]
> +/* Shared with TIFS */
> +&wkup_uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&wkup_uart0_pins_default>;
> + uart-has-rtscts;
> + bootph-all;
> + status = "okay";
> +};
Do you see possibility to keep reserve for fw ?
> diff --git a/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
> new file mode 100644
> index 000000000000..f9fb0c78ccde
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi
> @@ -0,0 +1,594 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
> + * Author: Dominik Haller <d.haller at phytec.de>
> + *
> + * https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
> [..]
> +
> +/* eMMC */
> +&main_sdhci0 {
> + disable-wp;
I think no need to disable-wp for eMMC
> + non-removable;
> + ti,driver-strength-ohm = <50>;
> + bootph-all;
> + status = "okay";
> +};
> +
> [..]
> +
> + pmic at 48 {
> + compatible = "ti,tps6594-q1";
> + reg = <0x48>;
> + system-power-controller;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_irq_pins_default>;
> + interrupt-parent = <&wkup_gpio0>;
> + interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + buck12-supply = <&vcc_3v3>;
> + buck3-supply = <&vcc_3v3>;
> + buck4-supply = <&vcc_3v3>;
> + buck5-supply = <&vcc_3v3>;
> + ldo1-supply = <&vcc_3v3>;
> + ldo2-supply = <&vcc_3v3>;
> + ldo3-supply = <&vcc_3v3>;
> + ldo4-supply = <&vcc_3v3>;
> + ti,primary-pmic;
> +
> + regulators {
> + bucka12: buck12 {
> + regulator-name = "VDD_DDR_1V1";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-boot-on;
> + regulator-always-on;
In case you want to enable ESM reset in u-boot,
Please carry bootph-all or bootph-pre-ram in one of regulator node
> + };
> [..]
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