[PATCH v7 0/8] soc: ti: Add and use PVU on K3-AM65 for DMA isolation

[Nishanth Menon]

On 11:34-20250418, Bjorn Helgaas wrote:
> On Fri, Apr 18, 2025 at 08:43:24AM -0500, Nishanth Menon wrote:
> > On 15:30-20250418, huaqian.li at siemens.com wrote:
> > > 
> > > Jan Kiszka (7):
> > >   dt-bindings: soc: ti: Add AM65 peripheral virtualization unit
> > >   dt-bindings: PCI: ti,am65: Extend for use with PVU
> > >   soc: ti: Add IOMMU-like PVU driver
> > >   PCI: keystone: Add support for PVU-based DMA isolation on AM654
> > >   arm64: dts: ti: k3-am65-main: Add PVU nodes
> > >   arm64: dts: ti: k3-am65-main: Add VMAP registers to PCI root complexes
> > >   arm64: dts: ti: iot2050: Add overlay for DMA isolation for devices
> > >     behind PCI RC
> > > 
> > > Li Hua Qian (1):
> > >   swiotlb: Make IO_TLB_SEGSIZE configurable
> > 
> > I see at least 3 or 4 maintainers needing to co-ordinate, gets
> > complicated as I am not sure which maintainer needs to pick up what
> > patches in what dependency order. This looks like a mixed bag. Can
> > we split this patch into independent series for each maintainer with
> > clear indication of dependencies that is spread around a couple of
> > kernel windows (maybe dts comes in last?)
> 
> The keystone patch ("[4/8] PCI: keystone: Add support for PVU-based
> DMA isolation on AM654") depends on interfaces added by "[3/8] soc:
> ti: Add IOMMU-like PVU driver", so I can't really take 4/8 by itself.
> 
> But I've acked 4/8, so it can be merged along with the rest of the
> series.  I assumed the easiest would be via the drivers/soc/ti/
> maintainer, i.e., you, Nisanth :)
> 
> Let me know if I can do anything.

Thanks Bjorn, the swiotlb probably is one of the first to go in, I
guess.. I will let Li Hua/Jan suggest how they'd like to queue this.

-- 
Regards,
Nishanth Menon
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