[PATCH 0/7] AM64 and J7X DT: Enable PCIe 64-bit Address Space

Siddharth Vadapalli s-vadapalli at ti.com
Thu Apr 17 05:04:00 PDT 2025


Hello,

The Cadence PCIe Controllers in TI's K3 SoCs namely:
AM64, J7200, J721E, J721S2 (AM68), J722S, J742S2 and J784S4 (AM69)
support two address regions:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

Currently, the 128 MB region in the 32-bit address space is enabled in
the device-tree. This might be suitable for most of the use-cases, but
for those use-cases requiring larger address regions than 128 MB it is
necessary to switch to the 64-bit address space with the 4 GB address
region. This series implements the corresponding device-tree changes to
support the 4 GB address region as the default configuration. Existing
use-cases should continue to work without any regression.

Series is based on linux-next tagged next-20250416.

Series has been tested on AM642-EVM, J7200-EVM, J721E-EVM, J721S2-EVM,
J722S-EVM and J784S4-EVM using an NVMe SSD connected to the PCIe
Connector on the EVMs.

Test Logs:
1. AM642-EVM PCIe0
https://gist.github.com/Siddharth-Vadapalli-at-TI/5c3e2e462066ed8a976273db94e856e3
2. J7200-EVM PCIe1
https://gist.github.com/Siddharth-Vadapalli-at-TI/47e1219258b310a1ac0e4a6d7324af33
3. J721E-EVM PCIe0
https://gist.github.com/Siddharth-Vadapalli-at-TI/85abe9ea5032f8e17b2634d616bf0db3
4. J721E-EVM PCIe1
https://gist.github.com/Siddharth-Vadapalli-at-TI/3e42d0f46fe92d353c9a2ae950e4cd64
5. J721S2-EVM PCIe1
https://gist.github.com/Siddharth-Vadapalli-at-TI/7afcf78a6f2601ca9dcf92ca9164be46
6. J722S-EVM PCIe0
https://gist.github.com/Siddharth-Vadapalli-at-TI/6be87d2e2d616db34af0c00b3df66daa
7. J784S4-EVM PCIe0
https://gist.github.com/Siddharth-Vadapalli-at-TI/44f3285756c9f62c7f7d69a10a7b5888

Regards,
Siddharth.

Siddharth Vadapalli (7):
  arm64: dts: ti: k3-am64-main: switch to 64-bit address space for PCIe0
  arm64: dts: ti: k3-j7200-main: switch to 64-bit address space for
    PCIe1
  arm64: dts: ti: k3-j721e: add ranges for PCIe0 DAT1 and PCIe1 DAT1
  arm64: dts: ti: k3-j721e-main: switch to 64-bit address space for
    PCIe0 and PCIe1
  arm64: dts: ti: k3-j721s2-main: switch to 64-bit address space for
    PCIe1
  arm64: dts: ti: k3-j722s-main: switch to 64-bit address space for
    PCIe0
  arm64: dts: ti: k3-j784s4-j742s2-main-common: switch to 64-bit address
    space for PCIe0 and PCIe1

 arch/arm64/boot/dts/ti/k3-am64-main.dtsi           |  7 ++++---
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi          |  7 ++++---
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi          | 14 ++++++++------
 arch/arm64/boot/dts/ti/k3-j721e.dtsi               |  2 ++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi         |  7 ++++---
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi          |  7 ++++---
 .../boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi  | 14 ++++++++------
 7 files changed, 34 insertions(+), 24 deletions(-)

-- 
2.34.1




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