[PATCH 2/2] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23

[Marc Zyngier]

On Tue, 15 Apr 2025 23:13:43 +0100,
D Scott Phillips <scott at os.amperecomputing.com> wrote:
> 
> Marc Zyngier <maz at kernel.org> writes:
> 
> > On Tue, 15 Apr 2025 16:47:11 +0100,
> > If the write to HCR_EL2 can corrupt translations, what guarantees that
> > such write placed on a page boundary (therefore requiring another TLB
> > lookup to continue in sequence) will be able to get to the ISB?
> 
> Hi Marc, I understand now from the core team that an ISB on another page
> will be ok as the problem is on the data side only.

Are you guaranteed that a younger data access can't be hoisted up and
affect things similarly? I don't see anything that would prevent this.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.