[PATCH 2/2] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23
Marc Zyngier
maz at kernel.org
Tue Apr 15 11:38:29 PDT 2025
On Tue, 15 Apr 2025 16:47:11 +0100,
D Scott Phillips <scott at os.amperecomputing.com> wrote:
>
> Updates to HCR_EL2 can rarely corrupt simultaneous translations from
> either earlier translations (back to the previous dsb) or later
> translations (up to the next isb). Put a dsb before and isb after writes
> to HCR_EL2.
If the write to HCR_EL2 can corrupt translations, what guarantees that
such write placed on a page boundary (therefore requiring another TLB
lookup to continue in sequence) will be able to get to the ISB?
M.
--
Without deviation from the norm, progress is not possible.
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