[PATCH v15 5/7] firmware: imx: add driver for NXP EdgeLock Enclave

Pankaj Gupta pankaj.gupta at nxp.com
Tue Apr 8 00:02:50 PDT 2025


> diff --git a/drivers/firmware/imx/ele_base_msg.c 
> b/drivers/firmware/imx/ele_base_msg.c
> new file mode 100644
> index 000000000000..c843a5508a9e
> --- /dev/null
>> +++ b/drivers/firmware/imx/ele_base_msg.c
> @@ -0,0 +1,312 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright 2025 NXP
>> + */
>> +
>> +int ele_fw_authenticate(struct se_if_priv *priv, phys_addr_t addr) {
>> +	struct se_api_msg *tx_msg __free(kfree) = NULL;
>> +	struct se_api_msg *rx_msg __free(kfree) = NULL;
>> +	int ret = 0;
>> +
>> +	if (!priv)
>> +		return -EINVAL;
>> +
>> +	tx_msg = kzalloc(ELE_FW_AUTH_REQ_SZ, GFP_KERNEL);
>> +	if (!tx_msg)
>> +		return -ENOMEM;
>> +
>> +	rx_msg = kzalloc(ELE_FW_AUTH_RSP_MSG_SZ, GFP_KERNEL);
>> +	if (!rx_msg)
>> +		return -ENOMEM;
>> +
>> +	ret = se_fill_cmd_msg_hdr(priv,
>> +				  (struct se_msg_hdr *)&tx_msg->header,
>> +				  ELE_FW_AUTH_REQ,
>> +				  ELE_FW_AUTH_REQ_SZ,
>> +				  true);
>> +	if (ret)
>> +		return ret;
>> +
>> +	tx_msg->data[1] = upper_32_bits(addr);
>> +	tx_msg->data[0] = lower_32_bits(addr);
>> +	tx_msg->data[2] = addr;


> are you sure 0 lower, 1 is upper
> in ele_get_info(), 0 is upper, 1 lower.
Yes.

> Please order as index.
Accepted.

> why need fill "tx_msg->data[2] = addr" (0,1 already have addr)
As per FW spec after the header, the 3rd word should contain the actual
address of the image, conveyed by the container. 
In our case container address is same as that of the image address conveyed
by the container.

Accepted, Will add another argument img_addr. And re-name the addr to
contnr_addr.

>> +
>> +	ret = ele_msg_send_rcv(priv,
>> +			       tx_msg,
>> +			       ELE_FW_AUTH_REQ_SZ,
>> +			       rx_msg,
>> +			       ELE_FW_AUTH_RSP_MSG_SZ);
>> +	if (ret < 0)
>> +		return ret;
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