[PATCH 0/2] J722S: Disable WIZ0 and WIZ1 in SoC file

[Siddharth Vadapalli]

Hello,

This series disables the "serdes_wiz0" and "serdes_wiz1" device-tree
nodes in the J722S SoC file and enables them in the board files where
they are required along with "serdes0" and "serdes1". There are two
reasons behind this change:
1. To follow the existing convention of disabling nodes in the SoC file
   and enabling them in the board file as required.
2. To address situations where a board file hasn't explicitly disabled
   "serdes_wiz0" and "serdes_wiz1" (example: am67a-beagley-ai.dts)
   as a result of which booting the board displays the following errors:
     wiz bus at f0000:phy at f000000: probe with driver wiz failed with error -12
     ...
     wiz bus at f0000:phy at f010000: probe with driver wiz failed with error -12

Series is based on linux-next tagged next-20250408.

Regards,
Siddharth.

Siddharth Vadapalli (2):
  arm64: dts: ti: k3-j722s-evm: Enable serdes_wiz0 and serdes_wiz1
  arm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1"

 arch/arm64/boot/dts/ti/k3-j722s-evm.dts   | 8 ++++++++
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 4 ++++
 2 files changed, 12 insertions(+)

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2.34.1