[PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios property

[Sherry Sun]

> -----Original Message-----
> From: Francesco Dolcini <francesco at dolcini.it>
> Sent: Monday, April 7, 2025 3:23 PM
> To: Sherry Sun <sherry.sun at nxp.com>
> Cc: Francesco Dolcini <francesco at dolcini.it>; Hongxing Zhu
> <hongxing.zhu at nxp.com>; l.stach at pengutronix.de; lpieralisi at kernel.org;
> kw at linux.com; robh at kernel.org; bhelgaas at google.com;
> krzysztof.kozlowski+dt at linaro.org; conor+dt at kernel.org;
> shawnguo at kernel.org; s.hauer at pengutronix.de; kernel at pengutronix.de;
> festevam at gmail.com; dl-linux-imx <linux-imx at nxp.com>; linux-
> pci at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> devicetree at vger.kernel.org; linux-kernel at vger.kernel.org
> Subject: Re: [PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios property
> 
> On Mon, Apr 07, 2025 at 07:18:32AM +0000, Sherry Sun wrote:
> >
> >
> > > -----Original Message-----
> > > From: Francesco Dolcini <francesco at dolcini.it>
> > > Sent: Friday, April 4, 2025 5:42 PM
> > > To: Sherry Sun <sherry.sun at nxp.com>
> > > Cc: Hongxing Zhu <hongxing.zhu at nxp.com>; l.stach at pengutronix.de;
> > > lpieralisi at kernel.org; kw at linux.com; robh at kernel.org;
> > > bhelgaas at google.com; krzysztof.kozlowski+dt at linaro.org;
> > > conor+dt at kernel.org; shawnguo at kernel.org; s.hauer at pengutronix.de;
> > > kernel at pengutronix.de; festevam at gmail.com; dl-linux-imx <linux-
> > > imx at nxp.com>; linux-pci at vger.kernel.org; linux-arm-
> > > kernel at lists.infradead.org; devicetree at vger.kernel.org; linux-
> > > kernel at vger.kernel.org
> > > Subject: Re: [PATCH V2 2/4] dt-bindings: imx6q-pcie: Add wake-gpios
> > > property
> > >
> > > Hello
> > >
> > > On Wed, Dec 13, 2023 at 05:28:48PM +0800, Sherry Sun wrote:
> > > > Add wake-gpios property that can be used to wakeup the host processor.
> > > >
> > > > Signed-off-by: Sherry Sun <sherry.sun at nxp.com>
> > > > Reviewed-by: Richard Zhu <hongxing.zhu at nxp.com>
> > > > ---
> > > >  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6
> > > > ++++++
> > > >  1 file changed, 6 insertions(+)
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > index 81bbb8728f0f..fba757d937e1 100644
> > > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > > > @@ -72,6 +72,12 @@ properties:
> > > >        L=operation state) (optional required).
> > > >      type: boolean
> > > >
> > > > +  wake-gpios:
> > > > +    description: If present this property specifies WAKE# sideband
> signaling
> > > > +      to implement wakeup functionality. This is an input GPIO
> > > > + pin for the
> > > Root
> > > > +      Port mode here. Host drivers will wakeup the host using the IRQ
> > > > +      corresponding to the passed GPIO.
> > > > +
> > >
> > > From what I know it is possible to share the same WAKE# signal for
> > > multiple root ports. Is this going to work fine with this binding?
> > > Same question on the driver.
> > >
> > > We do have design exactly like that, so it's not a theoretical question.
> > >
> > The current design doesn't support such case, maybe some changes in
> > the driver could achieve that (mark the wake-gpio as
> > GPIOD_FLAGS_BIT_NONEXCLUSIVE and the interrupt as IRQF_SHARED,
> etc.).
> 
> Can you consider implementing this?
> 
> > But usually each RC has its own WAKE# pin assigned. We have not come
> > across a case where multiple RC share the same WAKE# pin.
> 
> We do have such design, with an NXP iMX95 SoC, available now.
> 

Hi Francesco,

Now the patch set is pending, please check the comment under
https://patchwork.kernel.org/project/linux-pci/cover/20231213092850.1706042-1-sherry.sun@nxp.com/ .
Seems this property should be put into the common PCI root port schema,
now it relies on the pci-bus.yaml splitting job Rob is doing.

Best Regards
Sherry