[PATCH 3/3] arm64: dts: st: add st,stm32mp2-cortex-a7-gic in intc node in stm32mp251.dtsi

[Marc Zyngier]

On Fri, 04 Apr 2025 13:17:08 +0100,
Christian Bruel <christian.bruel at foss.st.com> wrote:
> 
> 
> 
> On 4/3/25 19:27, Marc Zyngier wrote:
> > On Thu, 03 Apr 2025 13:28:05 +0100,
> > Christian Bruel <christian.bruel at foss.st.com> wrote:
> >> 
> >> Add st,stm32mp2-cortex-a7-gic to enable the GICC_DIR register remap
> >> 
> >> Signed-off-by: Christian Bruel <christian.bruel at foss.st.com>
> >> ---
> >>   arch/arm64/boot/dts/st/stm32mp251.dtsi | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >> 
> >> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> >> index f3c6cdfd7008..030e5da67a7e 100644
> >> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> >> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> >> @@ -115,7 +115,7 @@ scmi_vdda18adc: regulator at 7 {
> >>   	};
> >>     	intc: interrupt-controller at 4ac00000 {
> >> -		compatible = "arm,cortex-a7-gic";
> >> +		compatible = "st,stm32mp2-cortex-a7-gic", "arm,cortex-a7-gic";
> > 
> > What nonsense is this? This is an *arm64* machine, with I expect a
> > GIC400. Where is this A7 compat coming from?
> 
> Probably historical, as the first port was for aarch32. I will fix
> this separately. thanks for the head up!

Then while you're at it, you may want to consider removing the
"always-on" property in the timer, because I'm pretty sure the
comparator goes down in low power mode on A53 and A35, and loses its
value.

In general, only VMs can make use of this property.

	M.

-- 
Jazz isn't dead. It just smells funny.