[PATCH v1 3/9] coresight: etm4x: Support atclk

[Anshuman Khandual]

On 3/27/25 17:07, Leo Yan wrote:
> The atclk is an optional clock for the CoreSight ETMv4, but the driver
> misses to initialize it.
> 
> This change enables atclk in probe of the ETMv4 driver, and dynamically
> control the clock during suspend and resume.
> 
> No need to check the driver data and clock pointer in the runtime
> suspend and resume, so remove checks.  And add error handling in the
> resume function.
> 
> Add a minor fix to the comment format when adding the atclk field.
> 
> Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
> Signed-off-by: Leo Yan <leo.yan at arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm4x-core.c | 20 +++++++++++++++-----
>  drivers/hwtracing/coresight/coresight-etm4x.h      |  4 +++-
>  2 files changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index e5972f16abff..537d57006a25 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -2149,6 +2149,10 @@ static int etm4_probe(struct device *dev)
>  	if (WARN_ON(!drvdata))
>  		return -ENOMEM;
>  
> +	drvdata->atclk = devm_clk_get_optional_enabled(dev, "atclk");
> +	if (IS_ERR(drvdata->atclk))
> +		return PTR_ERR(drvdata->atclk);
> +
>  	if (pm_save_enable == PARAM_PM_SAVE_FIRMWARE)
>  		pm_save_enable = coresight_loses_context_with_cpu(dev) ?
>  			       PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER;
> @@ -2397,8 +2401,8 @@ static int etm4_runtime_suspend(struct device *dev)
>  {
>  	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev);
>  
> -	if (drvdata->pclk && !IS_ERR(drvdata->pclk))
> -		clk_disable_unprepare(drvdata->pclk);
> +	clk_disable_unprepare(drvdata->atclk);
> +	clk_disable_unprepare(drvdata->pclk);
>  
>  	return 0;
>  }
> @@ -2406,11 +2410,17 @@ static int etm4_runtime_suspend(struct device *dev)
>  static int etm4_runtime_resume(struct device *dev)
>  {
>  	struct etmv4_drvdata *drvdata = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = clk_prepare_enable(drvdata->pclk);
> +	if (ret)
> +		return ret;
>  
> -	if (drvdata->pclk && !IS_ERR(drvdata->pclk))
> -		clk_prepare_enable(drvdata->pclk);
> +	ret = clk_prepare_enable(drvdata->atclk);
> +	if (ret)
> +		clk_disable_unprepare(drvdata->pclk);
>  
> -	return 0;
> +	return ret;
>  }
>  #endif
>  
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index bd7db36ba197..0c21832b5d69 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -919,7 +919,8 @@ struct etmv4_save_state {
>  
>  /**
>   * struct etm4_drvdata - specifics associated to an ETM component
> - * @pclk        APB clock if present, otherwise NULL
> + * @pclk:       APB clock if present, otherwise NULL
> + * @atclk:      Optional clock for the core parts of the ETMv4.
>   * @base:       Memory mapped base address for this component.
>   * @csdev:      Component vitals needed by the framework.
>   * @spinlock:   Only one at a time pls.
> @@ -987,6 +988,7 @@ struct etmv4_save_state {
>   */
>  struct etmv4_drvdata {
>  	struct clk			*pclk;
> +	struct clk			*atclk;
>  	void __iomem			*base;
>  	struct coresight_device		*csdev;
>  	raw_spinlock_t			spinlock;

Reviewed-by: Anshuman Khandual <anshuman.khandual at arm.com>