[PATCH 21/47] arm64/sysreg: Add register fields for SPMSCR_EL1
Anshuman Khandual
anshuman.khandual at arm.com
Mon Sep 30 19:43:30 PDT 2024
This adds register fields for SPMSCR_EL1 as per the definitions based
on DDI0601 2024-06.
Cc: Catalin Marinas <catalin.marinas at arm.com>
Cc: Will Deacon <will at kernel.org>
Cc: Mark Brown <broonie at kernel.org>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
---
arch/arm64/tools/sysreg | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 55836abbc8cc..44fabd1f3aef 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -130,6 +130,15 @@ Sysreg PMCCNTSVR_EL1 2 0 14 11 7
Field 63:0 CCNT
EndSysreg
+Sysreg SPMSCR_EL1 2 7 9 14 7
+Field 63:32 IMP_DEF
+Field 31 RAO
+Res0 30:5
+Field 4 NAO
+Res0 3:1
+Field 0 SO
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS
--
2.25.1
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