[PATCH 05/21] clock:Add driver for ADI ADSP-SC5xx PLL
Arnd Bergmann
arnd at arndb.de
Fri Sep 13 00:27:59 PDT 2024
On Thu, Sep 12, 2024, at 18:24, Arturs Artamonovs via B4 Relay wrote:
> From: Arturs Artamonovs <arturs.artamonovs at analog.com>
>
> Implements clock tree, no dynamic pll rate change.
This could use a little more detail.
> drivers/clk/adi/clk-adi-pll.c | 151 ++++++++++++++++++++++++++++++++++++++++++
> drivers/clk/adi/clk.h | 99 +++++++++++++++++++++++++++
> 2 files changed, 250 insertions(+)
The header is only used in one file, to it's better to move all
the contents into the driver itself.
> +struct clk_sc5xx_cgu_pll *to_clk_sc5xx_cgu_pll(struct clk_hw *hw);
> +
> +struct clk *sc5xx_cgu_pll(const char *name, const char *parent_name,
> + void __iomem *base, u8 shift, u8 width, u32 m_offset, spinlock_t
> *lock);
Do these need to be global symbols? It's generally better to make
all functions 'static' unless they need to be called from another file.
Arnd
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