[PATCH 2/2] irqchip/gic-v3-its: Rely on genpool alignment

[Catalin Marinas]

On Thu, Sep 05, 2024 at 10:17:38AM +0100, Steven Price wrote:
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 557214c774c3..49aacf96ade2 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -700,7 +700,6 @@ static struct its_collection *its_build_mapd_cmd(struct its_node *its,
>  	u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites);
>  
>  	itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt);
> -	itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN);
>  
>  	its_encode_cmd(cmd, GITS_CMD_MAPD);
>  	its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id);
> @@ -3495,7 +3494,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
>  	 */
>  	nr_ites = max(2, nvecs);
>  	sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
> -	sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
> +	sz = max(sz, ITS_ITT_ALIGN);

Even without the gen_pool patch, I think the only problem was the slob
allocator which we got rid of.

>  	itt = itt_alloc_pool(its->numa_node, sz);

With gen_pool created with a min order of get_order(ITS_ITT_ALIGN), I
don't think we even need the sz = max(...) above. It's harmless though.

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>