[PATCH 00/16] Add initial USB support for the Renesas RZ/G3S SoC

[Biju Das]

Hi Claudiu,

> -----Original Message-----
> From: claudiu beznea <claudiu.beznea at tuxon.dev>
> Sent: Tuesday, September 3, 2024 1:57 PM
-
> clk at vger.kernel.org; linux-pm at vger.kernel.org; Claudiu Beznea <claudiu.beznea.uj at bp.renesas.com>
> Subject: Re: [PATCH 00/16] Add initial USB support for the Renesas RZ/G3S SoC
> 
> 
> 
> On 03.09.2024 15:37, Biju Das wrote:
> >
> >
> >> -----Original Message-----
> >> From: claudiu beznea <claudiu.beznea at tuxon.dev>
> >> Sent: Tuesday, September 3, 2024 1:26 PM
> >> To: Biju Das <biju.das.jz at bp.renesas.com>; Ulf Hansson
> >> <ulf.hansson at linaro.org>
> >> Cc: vkoul at kernel.org; kishon at kernel.org; robh at kernel.org;
> >> krzk+dt at kernel.org; conor+dt at kernel.org; p.zabel at pengutronix.de;
> >> geert+renesas at glider.be; magnus.damm at gmail.com;
> >> gregkh at linuxfoundation.org; mturquette at baylibre.com;
> >> sboyd at kernel.org; Yoshihiro Shimoda
> >> <yoshihiro.shimoda.uh at renesas.com>;
> >> linux-phy at lists.infradead.org; devicetree at vger.kernel.org;
> >> linux-kernel at vger.kernel.org; linux- renesas-soc at vger.kernel.org;
> >> linux-usb at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> >> linux- clk at vger.kernel.org; linux-pm at vger.kernel.org; Claudiu Beznea
> >> <claudiu.beznea.uj at bp.renesas.com>
> >> Subject: Re: [PATCH 00/16] Add initial USB support for the Renesas
> >> RZ/G3S SoC
> >>
> >>
> >>
> >> On 03.09.2024 15:00, Biju Das wrote:
> >>>
> >>>
> >>>> -----Original Message-----
> >>>> From: Biju Das <biju.das.jz at bp.renesas.com>
> >>>> Sent: Tuesday, September 3, 2024 12:07 PM
> >>>> To: Claudiu.Beznea <claudiu.beznea at tuxon.dev>; Ulf Hansson
> >>>> <ulf.hansson at linaro.org>
> >>>> Cc: vkoul at kernel.org; kishon at kernel.org; robh at kernel.org;
> >>>> krzk+dt at kernel.org; conor+dt at kernel.org; p.zabel at pengutronix.de;
> >>>> geert+renesas at glider.be; magnus.damm at gmail.com;
> >>>> gregkh at linuxfoundation.org; mturquette at baylibre.com;
> >>>> sboyd at kernel.org; Yoshihiro Shimoda
> >>>> <yoshihiro.shimoda.uh at renesas.com>;
> >>>> linux-phy at lists.infradead.org; devicetree at vger.kernel.org;
> >>>> linux-kernel at vger.kernel.org; linux- renesas-soc at vger.kernel.org;
> >>>> linux-usb at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> >>>> linux- clk at vger.kernel.org; linux-pm at vger.kernel.org; Claudiu
> >>>> Beznea <claudiu.beznea.uj at bp.renesas.com>
> >>>> Subject: RE: [PATCH 00/16] Add initial USB support for the Renesas
> >>>> RZ/G3S SoC
> >>>>
> >>>> Hi Claudiu,
> >>>>
> >>>>> -----Original Message-----
> >>>>> From: claudiu beznea <claudiu.beznea at tuxon.dev>
> >>>>> Sent: Tuesday, September 3, 2024 12:00 PM
> >>>>> Subject: Re: [PATCH 00/16] Add initial USB support for the Renesas
> >>>>> RZ/G3S SoC
> >>>>>
> >>>>>
> >>>>>
> >>>>> On 03.09.2024 13:31, Biju Das wrote:
> >>>>>>>> During boot clr USB PWR READY signal in TF-A.
> >>>>>>>> STR case, suspend set USB PWR READY signal in TF-A.
> >>>>>>>> STR case, resume clr USB PWR READY signal in TF-A.
> >>>>>>> As I said previously, it can be done in different ways. My point
> >>>>>>> was to let Linux set what it needs for all it's devices to work.
> >>>>>>> I think the way to go forward is a
> >>>>> maintainer decision.
> >>>>>>
> >>>>>> I agree, there can be n number of solution for a problem.
> >>>>>>
> >>>>>> Since you modelled system state signal (USB PWRRDY) as reset
> >>>>>> control signal, it is reset/DT maintainer's decision to say the
> >>>>>> final word whether this signal fits in reset
> >>>>> system framework or not?
> >>>>>
> >>>>> I was thinking:
> >>>>> 1/ Geert would be the best to say if he considers it OK to handle this
> >>>>>    in Linux
> >>>>
> >>>> I agree Geert is the right person for taking SYSTEM decisions,
> >>>> since the signal is used only during state transitions (Table
> >>>> 41.6.4 AWO to ALL_ON and 41.6.3 ALL_ON to AWO)
> >>>
> >>> One more info, as per [1], this USB PWRRDY signal setting to be before Linux kernel boots.
> >>
> >> The "controlled by" column mentions CA-55 on PWRRDY signal control
> >> line and it is b/w steps "DDR exits from retention mode" and  "clock
> >> start settings for system bus and peripheral modules". AFAICT, after DDR exists retention mode
> Linux is ready to run.
> >
> > DDR retention exit happens in TF-A and it jumps into reset code where it executes BL2 in TF_A. Bl2
> checks for warm or cold reset.
> > If it is warm reset, it sets required minimal clocks/resets and pass
> > the control to linux by calling the SMC callback handler. Which in turn calls resume(step 11-->14)
> path.
> 
> Is this from HW manual or some specific documentation? I'm referring at "resume" == "steps 11-->14"
> 
> >
> > Step 8, Cortex-A55 Exit from DDR retention mode (when using) Setting
> > for exiting form DDR retention mode Step 9, Cortex-A55 USB PHY PWRRDY
> > signal control (if use USB) SYS_USB_PWRRDY Step 10, Cortex-A55 PCIe
> > RST_RSM_B signal control (if use PCIe) SYS_PCIE_RST_RSM_B
> 
> Note *if use*: how does the TF-A know if USB/PCIe is used by Linux? The documentation mention to set
> it *if use*. Same note is on ALL_ON to VBATT transition documentation (namely "if using USB", "if
> using PCIe"). If TF-A will do this it should set this signals unconditionally. It will not be
> something wrong though. We don't know at the moment what this involves in terms of power consumption,
> if it means something...

You mean, you modelled this as reset signal just to reduce power consumption by calling runtime PM
calls to turn on/off this signal??

Does will it have any system stability issue as hardware manual says to do it at very early stage
before starting any clocks/resets?? Have you checked with hardware team?

Cheers,
Biju