[PATCH v11 4/4] firmware: ti_sci: add CPU latency constraint management

Nishanth Menon nm at ti.com
Tue Sep 3 05:45:40 PDT 2024


On 17:54-20240902, Nathan Chancellor wrote:
[...]

> > @@ -3669,7 +3671,27 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info)
> >  static int __maybe_unused ti_sci_suspend(struct device *dev)
> >  {
> >  	struct ti_sci_info *info = dev_get_drvdata(dev);
> > -	int ret;
> > +	struct device *cpu_dev, *cpu_dev_max = NULL;
> > +	s32 val, cpu_lat = 0;
> > +	int i, ret;
> > +
> > +	if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) {
> > +		for_each_possible_cpu(i) {
> > +			cpu_dev = get_cpu_device(i);
> > +			val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY);
> 
> This change is now in -next as commit 458d22d2e064 ("firmware: ti_sci:
> add CPU latency constraint management"), where it breaks the build
> when this driver is built as a module because dev_pm_qos_read_value() is
> not exported to modules:
> 
>   ERROR: modpost: "dev_pm_qos_read_value" [drivers/firmware/ti_sci.ko] undefined!
> 
> Obviously exporting it would fix the build but sometimes that is
> controversial, hence just the report.

Thank you for the report. I will drop the series from my queue for now.
That should give us some time to sort things out properly for the next
window.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D



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